Problem Fix / Workaround
The NOP instruction will always be executed correctly also right after a frequency
change. Thus, the next 8 instructions after the change should be NOP instructions.
To ensure this, follow this procedure:
1.Clear the I bit in the SREG Register.
2.Set the new pre-scaling factor in XDIV register.
3.Execute 8 NOP instructions
4.Set the I bit in SREG
This will ensure that all subsequent instructions will execute correctly.
Assembly Code Example:
CLI
; clear global interrupt enable
; set new prescale value
; no operation
OUT XDIV, temp
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
SEI
; no operation
; no operation
; no operation
; no operation
; no operation
; no operation
; no operation
; clear global interrupt enable
4. Stabilizing time needed when changing OSCCAL Register
After increasing the source clock frequency more than 2% with settings in the OSC-
CAL register, the device may execute some of the subsequent instructions
incorrectly.
Problem Fix / Workaround
The behavior follows errata number 1., and the same Fix / Workaround is applicable
on this errata.
5. IDCODE masks data from TDI input
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices
are replaced by all-ones during Update-DR.
Problem Fix / Workaround
–
–
If ATmega128 is the only device in the scan chain, the problem is not visible.
Select the Device ID Register of the ATmega128 by issuing the IDCODE
instruction or by entering the Test-Logic-Reset state of the TAP controller to
read out the contents of its Device ID Register and possibly data from
succeeding devices of the scan chain. Issue the BYPASS instruction to the
ATmega128 while reading the Device ID Registers of preceding devices of
the boundary scan chain.
–
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega128 must be the fist device in the chain.
22
ATmega128
2467OS–AVR–10/06
ATMEL [ ATMEL ]
