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ATMEGA128-16AU 参数 Datasheet PDF下载

ATMEGA128-16AU图片预览
型号: ATMEGA128-16AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有128K字节的系统内可编程闪存 [8-bit Microcontroller with 128K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 31 页 / 308 K
品牌: ATMEL [ ATMEL ]
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ATmega128  
Errata  
The revision letter in this section refers to the revision of the ATmega128 device.  
ATmega128 Rev. M  
First Analog Comparator conversion may be delayed  
Interrupts may be lost when writing the timer registers in the asynchronous timer  
Stabilizing time needed when changing XDIV Register  
Stabilizing time needed when changing OSCCAL Register  
IDCODE masks data from TDI input  
1. First Analog Comparator conversion may be delayed  
If the device is powered by a slow rising VCC, the first Analog Comparator conver-  
sion will take longer than expected on some devices.  
Problem Fix/Workaround  
When the device has been powered or reset, disable then enable theAnalog Com-  
parator before the first conversion.  
2. Interrupts may be lost when writing the timer registers in the asynchronous  
timer  
If one of the timer registers which is synchronized to the asynchronous timer2 clock  
is written in the cycle before a overflow interrupt occurs, the interrupt may be lost.  
Problem Fix/Workaround  
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the  
value 0xFF before writing the Timer2 Control Register, TCCR2, or Output Compare  
Register, OCR2  
3. Stabilizing time needed when changing XDIV Register  
After increasing the source clock frequency more than 2% with settings in the XDIV  
register, the device may execute some of the subsequent instructions incorrectly.  
Problem Fix / Workaround  
The NOP instruction will always be executed correctly also right after a frequency  
change. Thus, the next 8 instructions after the change should be NOP instructions.  
To ensure this, follow this procedure:  
1.Clear the I bit in the SREG Register.  
2.Set the new pre-scaling factor in XDIV register.  
3.Execute 8 NOP instructions  
4.Set the I bit in SREG  
This will ensure that all subsequent instructions will execute correctly.  
Assembly Code Example:  
CLI  
; clear global interrupt enable  
; set new prescale value  
; no operation  
OUT XDIV, temp  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
SEI  
; no operation  
; no operation  
; no operation  
; no operation  
; no operation  
; no operation  
; no operation  
; set global interrupt enable  
17  
2467OS–AVR–10/06