Table 29-15. Explanation of different variables used in Figure 29-3 and the mapping to the Z-
pointer, ATmega2560/2561
Corresponding
Variable
Z-value(2)
Description(1)
Most significant bit in the Program Counter. (The
Program Counter is 17 bits PC[16:0])
PCMSB
16
6
Most significant bit which is used to address the
words within one page (128 words in a page
requires seven bits PC [6:0]).
PAGEMSB
ZPCMSB
Bit in Z-pointer that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Z17:Z16(3)
Z7
Bit in Z-pointer that is mapped to PCMSB. Because
Z0 is not used, the ZPAGEMSB equals PAGEMSB +
1.
ZPAGEMSB
PCPAGE
Program Counter page address: Page select, for
Page Erase and Page Write
PC[16:7]
PC[6:0]
Z17(3):Z8
Z7:Z1
Program Counter word address: Word select, for
filling temporary buffer (must be zero during Page
Write operation)
PCWORD
Notes: 1. Z0: should be zero for all SPM commands, byte select for the (E)LPM instruction.
2. See “Addressing the Flash During Self-Programming” on page 323 for details about the use of
Z-pointer during Self-Programming.
3. The Z-register is only 16 bits wide. Bit 16 is located in the RAMPZ register in the I/O map.
29.7 Register Description
29.7.1
SPMCSR – Store Program Memory Control and Status Register
The Store Program Memory Control and Status Register contains the control bits needed to con-
trol the Boot Loader operations.
Bit
7
SPMIE
R/W
0
6
5
SIGRD
R/W
0
4
RWWSRE
R/W
3
BLBSET
R/W
0
2
PGWRT
R/W
0
1
PGERS
R/W
0
0
SPMEN
R/W
0
RWWSB
SPMCSR
0x37 (0x57)
Read/Write
Initial Value
R
0
0
• Bit 7 – SPMIE: SPM Interrupt Enable
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM
ready interrupt will be enabled. The SPM ready Interrupt will be executed as long as the SPMEN
bit in the SPMCSR Register is cleared.
• Bit 6 – RWWSB: Read-While-Write Section Busy
When a Self-Programming (Page Erase or Page Write) operation to the RWW section is initi-
ated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, the RWW section
cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bit is written to one after a
Self-Programming operation is completed. Alternatively the RWWSB bit will automatically be
cleared if a page load operation is initiated.
• Bit 5 – SIGRD: Signature Row Read
334
ATmega640/1280/1281/2560/2561
2549L–AVR–08/07
ATMEL [ ATMEL ]
