Features
•
Industry Standard Architecture
– Low Cost Easy-to-Use Software Tools
•
High-Speed, Electrically-Erasable Programmable Logic Devices
– 7.5 ns Maximum Pin-to-Pin Delay
•
Several Power Saving Options
Device
ATF22V10B
ATF22V10BQ
ATF22V10BQL
I
CC
, Stand-By
85 mA
35 mA
5 mA
I
CC
, Active
90 mA
40 mA
20 mA
•
CMOS and TTL Compatible Inputs and Outputs
– Input and I/O Pull-Up Resistors
High-
Performance
EE PLD
ATF22V10B
•
Advanced Flash Technology
– Reprogrammable
– 100% Tested
•
High Reliability CMOS Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
•
Full Military, Commercial, and Industrial Temperature Ranges
•
Dual-in-Line and Surface Mount Packages in Standard Pinouts
Logic Diagram
TSSOP Top View
Pin Configurations
Pin Name
CLK
Function
Clock
IN
I/O
*
V
CC
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5V Supply
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
DIP/SOIC
LCC/PLCC
Rev. 0250F–05/98
Top View
1