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ATF1508AS-15JC84 参数 Datasheet PDF下载

ATF1508AS-15JC84图片预览
型号: ATF1508AS-15JC84
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能EE PLD [Highperformance EE PLD]
分类和应用:
文件页数/大小: 31 页 / 692 K
品牌: ATMEL [ ATMEL CORPORATION ]
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Design
Software
Support
Power-up Reset
ATF1508AS designs are supported by several third-party tools. Automated fitters allow logic
synthesis using a variety of high level description languages and formats.
The ATF1508AS is designed with a power-up reset, a feature critical for state machine initial-
ization. At a point delayed slightly from V
CC
crossing V
RST
, all registers will be initialized, and
the state of each output will depend on the polarity of its buffer. However, due to the asynchro-
nous nature of reset and uncertainty of how V
CC
actually rises in the system, the following
conditions are required:
1. The V
CC
rise must be monotonic,
2. After reset occurs, all input and feedback setup times must be met before driving the
clock pin high, and,
3. The clock must remain stable during T
D
.
The ATF1508AS has two options for the hysteresis about the reset level, V
RST
, Small and
Large. During the fitting process users may configure the device with the Power-up Reset hys-
teresis set to Large or Small. Atmel POF2JED users may select the Large option by including
the flag “-power_reset” on the command line after “filename.POF”. To allow the registers to be
properly reinitialized with the Large hysteresis option selected, the following condition is
added:
4. If V
CC
falls below 2.0V, it must shut off completely before the device is turned on again.
When the Large hysteresis option is active, I
CC
is reduced by several hundred microamps as
well.
Security Fuse
Usage
Programming
A single fuse is provided to prevent unauthorized copying of the ATF1508AS fuse patterns.
Once programmed, fuse verify is inhibited. However, User Signature and device ID remains
accessible.
ATF1508AS devices are in-system programmable (ISP) devices utilizing the 4-pin JTAG pro-
tocol. This capability eliminates package handling normally required for programming and
facilitates rapid design iterations and field changes.
Atmel provides ISP hardware and software to allow programming of the ATF1508AS via the
PC. ISP is performed by using either a download cable or a comparable board tester or a sim-
ple microprocessor interface.
To allow ISP programming support by the Automated Test Equipment (ATE) vendors, Serial
Vector Format (SVF) files can be created by the Atmel ISP Software. Conversion to other ATE
tester format beside SVF is also possible
ATF1508AS devices can also be programmed using standard third-party programmers. With
third-party programmer, the JTAG ISP port can be disabled thereby allowing four additional
I/O pins to be used for logic.
Contact your local Atmel representatives or Atmel PLD applications for details.
8
ATF1508AS(L)
0784P–PLD–7/05