AT93C46D
Table 1-4.
Instruction Set for the AT93C46D
Op
Code
10
00
11
01
00
00
00
Address
x8
A
6
– A
0
11XXXXX
A
6
– A
0
A
6
– A
0
10XXXXX
01XXXXX
00XXXXX
x 16
A
5
– A
0
11XXXX
A
5
– A
0
A
5
– A
0
10XXXX
01XXXX
00XXXX
D
7
– D
0
D
15
– D
0
D
7
– D
0
D
15
– D
0
x8
Data
x 16
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erases memory location A
n
– A
0
Writes memory location A
n
– A
0
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
Disables all programming instructions
Instruction
READ
EWEN
ERASE
WRITE
ERAL
WRAL
EWDS
Note:
SB
1
1
1
1
1
1
1
The Xs in the address field represent
DON’T CARE
values and must be clocked.
2. Functional Description
The AT93C46D is accessed via a simple and versatile three-wire serial communication inter-
face. Device operation is controlled by seven instructions issued by the host processor.
A valid
instruction starts with a rising edge of CS
and consists of a start bit (logic “1”) followed by the
appropriate op code and the desired memory address location.
READ (READ):
The Read (READ) instruction contains the address code for the memory loca-
tion to be read. After the instruction and address are decoded, data from the selected memory
location is available at the serial output pin DO. Output data changes are synchronized with the
rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or
16-bit data output string.
ERASE/WRITE ENABLE (EWEN):
To assure data integrity, the part automatically goes into the
Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN)
instruction must be executed first before any programming instructions can be carried out.
Please note that once in the EWEN state, programming remains enabled until an EWDS instruc-
tion is executed or V
CC
power is removed from the part.
ERASE (ERASE):
The Erase (ERASE) instruction programs all bits in the specified memory
location to the logical “1” state. The self-timed erase cycle starts once the Erase instruction and
address are decoded. The DO pin outputs the Ready/Busy status of the part if CS is brought
high after being kept low for a minimum of 250 ns (t
CS
). A logic “1” at pin DO indicates that the
selected memory location has been erased and the part is ready for another instruction.
WRITE (WRITE):
The Write (WRITE) instruction contains the 8 or 16 bits of data to be written
into the specified memory location. The self-timed programming cycle t
WP
starts after the last bit
of data is received at serial data input pin DI. The DO pin outputs the Read/Busy status of the
part if CS is brought high after being kept low for a minimum of 250 ns (t
CS
). A logic “0” at DO
indicates that programming is still in progress. A logic “1” indicates that the memory location at
the specified address has been written with the data pattern contained in the instruction and the
5
5193F–SEEPR–1/08
ATMEL [ ATMEL CORPORATION ]
