part is ready for further instructions.
A Ready/Busy status cannot be obtained if the CS is
brought high after the end of the self-timed programming cycle tWP.
ERASE ALL (ERAL):
The Erase All (ERAL) instruction programs every bit in the memory array
to the logic “1” state and is primarily used for testing purposes. The DO pin outputs the
Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns
(t
CS
). The ERAL instruction is valid only at V
CC
= 5.0V
±
10%.
WRITE ALL (WRAL):
The Write All (WRAL) instruction programs all memory locations with the
data patterns specified in the instruction. The DO pin outputs the Ready/Busy status of the part if
CS is brought high after being kept low for a minimum of 250 ns (t
CS
). The WRAL instruction is
valid only at V
CC
= 5.0V ± 10%.
ERASE/WRITE DISABLE (EWDS):
To protect against accidental data disturb, the Erase/Write
Disable (EWDS) instruction disables all programming modes and should be executed after all
programming operations. The operation of the Read instruction is independent of both the
EWEN and EWDS instructions and can be executed at any time.
6
AT93C46D
5193F–SEEPR–1/08
ATMEL [ ATMEL CORPORATION ]
