Figure 19-5. Manchester Frame error detection
Internal
Manchester
Clock
Resynchronize
Internal
Manchester
Clock
Start Bit
Start Bit
Bit 1
Bit 2
Bit 1
Bit 2
Manchester
Data
front shift
back shift
Framing Error
N3
Counter
Overflow
Start Bit
N1
Start Bit
N1
N3
N2
N2
Manchester
Decoder
N2/2
N1/2
Counter
N2/4
Transition outside
the detect window
Edge Detection
Space
Internal
Manchester
Clock
The counter reaches the counter overflow
value without reaching a manchester edge
Note:
Counter Overflow = MBURR[H:L]
When a Manchester framing error is detected the FEM bit and RxC bit are set at the same time.
This allows the application to execute the reception complete interrupt subroute when this error
conditon is detected.
When a Manchester framing error is detected, the EUSART receiver immediately enters in a
new start bit detection phase. Thus when a Manchester framing error is detected within a frame,
the receiver will process the rest of the frame as a new incomming frame and generate other
FEM errors.
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AT90PWM2/3/2B/3B
4317J–AVR–08/10