Program Memory Lock Bits
The AT89S53 has three lock bits that can be left unpro-
grammed (U) or can be programmed (P) to obtain the addi-
tional features listed in the following table.
value and holds that value until reset is activated. The
latched value of EA must agree with the current logic level
at that pin in order for the device to function properly.
When lock bit 1 is programmed, the logic level at the EA pin
is sampled and latched during reset. If the device is pow-
ered up without a reset, the latch initializes to a random
Once programmed, the lock bits can only be unpro-
grammed with the Chip Erase operations in either the par-
allel or serial modes.
Lock Bit Protection Modes (1) (2)
Program Lock Bits
Protection Type
LB1
U
LB2
U
LB3
U
1
2
No internal memory lock feature.
P
U
U
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory. EA is sampled and latched on reset and further programming of the Flash
memory (parallel or serial mode) is disabled.
3
4
P
P
P
P
U
P
Same as Mode 2, but parallel or serial verify are also disabled.
Same as Mode 3, but external execution is also disabled.
Notes: 1. U = Unprogrammed
2. P = Programmed
Parallel Programming Algorithm
To program and verify the AT89S53 in the parallel program-
ming mode, the following sequence is recommended:
Programming the Flash
Atmel’s AT89S53 Flash Microcontroller offers 12K bytes of
in-system reprogrammable Flash Code memory.
1. Power-up sequence:
The AT89S53 is normally shipped with the on-chip Flash
Code memory array in the erased state (i.e. contents =
FFH) and ready to be programmed. This device supports a
High-Voltage (12V) Parallel programming mode and a Low-
Voltage (5V) Serial programming mode. The serial pro-
gramming mode provides a convenient way to download
the AT89S53 inside the user’s system. The parallel pro-
gramming mode is compatible with conventional third party
Flash or EPROM programmers.
Apply power between VCC and GND pins.
Set RST pin to “H”.
Apply a 3 MHz to 24 MHz clock to XTAL1 pin and wait
for at least 10 milliseconds.
2. Set PSEN pin to “L”
ALE pin to “H”
EA pin to “H” and all other pins to “H”.
The Code memory array occupies one contiguous address
space from 0000H to 2FFFH.
3. Apply the appropriate combination of “H” or “L” logic
levels to pins P2.6, P2.7, P3.6, P3.7 to select one of the
programming operations shown in the Flash Program-
ming Modes table.
The Code array on the AT89S53 is programmed byte-by-
byte in either programming mode. An auto-erase cycle is
provided with the self-timed programming operation in the
serial programming mode. There is no need to perform the
Chip Erase operation to reprogram any memory location in
the serial programming mode unless any of the lock bits
have been programmed.
4. Apply the desired byte address to pins P1.0 to P1.7
and P2.0 to P2.5.
Apply data to pins P0.0 to P0.7 for Write Code opera-
tion.
5. Raise EA/VPP to 12V to enable Flash programming,
erase or verification.
In the parallel programming mode, there is no auto-erase
cycle. To reprogram any non-blank byte, the user needs to
use the Chip Erase operation first to erase the entire Code
memory array.
6. Pulse ALE/PROG once to program a byte in the Code
memory array, or the lock bits. The byte-write cycle is
self-timed and typically takes 1.5 ms.
7. To verify the byte just programmed, bring pin P2.7 to
“L” and read the programmed data at pins P0.0 to P0.7.
AT89S53
4-234
ATMEL [ ATMEL ]
