Control Interface (Slow SPI)
This interface controls the sensor’s internal registers. The protocol enables reading and
writing of these registers.
The master (host) initiates transfers to the slave (sensor). The sensor can only use its
interrupt pin to communicate with the host. When the host is interrupted, it must read the
status register before continuing operation.
The word length of the transferred data is fixed to 8 bits. The Most Significant Bit (MSB)
is sent first.
Communication Protocol Accesses to the host are structured in packets of words. The first word is the command
and the other words are the data.
The b7 bit is used to differentiate the command and data. When the word is a command,
b7 is high (“1”) and when the word is a piece of data, b7 is low (“0”).
The following protocol is used:
Command Format
The host indicates to the sensor if it wants to read or write into a register and indicates
the register’s address.
b7
1
b6
b5
b4
b3
b2
b1
x
b0
x
Read
(1)/Write (0)
Address (b3)
Address (b2)
Address (b1)
Address (b0)
Data Format (Writing into
If writing into a register, the host transmits the data.
Register)
b7
0
b6
b5
b4
b3
b2
b1
b0
Data (b6)
Data (b5)
Data (b4)
Data (b3)
Data (b2)
Data (b1)
Data (b0)
Data Format (Reading of
Register)
If reading a register, the host transmits one or several packets of data and data is shifted
in from the sensor. The host transmits dummy words with the data format (b7 is low
[“0”]). If reading the navigation or click pixel registers, the host transmits three packets of
data to read the three registers.
b7
0
b6
x
b5
x
b4
x
b3
x
b2
x
b1
x
b0
x
Note:
The host cannot communicate with the sensor without receiving data from it. Useless data is ignored by the host.
24
AT77C105A [Preliminary]
5419A–BIOM–01/05
ATMEL [ ATMEL ]
