Table 18-4. AC Characteristics – RapidS/Serial Interface
AT45DB161D
(2.5V Version)
AT45DB161D
Typ
Symbol
fSCK
Parameter
Min
Typ
Max
50
Min
Max
66
Units
MHz
MHz
SCK Frequency
fCAR1
SCK Frequency for Continuous Array Read
50
66
SCK Frequency for Continuous Array Read
(Low Frequency)
fCAR2
33
33
MHz
tWH
tWL
SCK High Time
6.8
6.8
0.1
0.1
50
5
6.8
6.8
0.1
0.1
50
5
ns
ns
SCK Low Time
(1)
tSCKR
SCK Rise Time, Peak-to-Peak (Slew Rate)
SCK Fall Time, Peak-to-Peak (Slew Rate)
Minimum CS High Time
CS Setup Time
V/ns
V/ns
ns
(1)
tSCKF
tCS
tCSS
tCSH
tCSB
tSU
ns
CS Hold Time
5
5
ns
CS High to RDY/BUSY Low
Data In Setup Time
100
100
ns
2
3
0
2
3
0
ns
tH
Data In Hold Time
ns
tHO
Output Hold Time
ns
tDIS
Output Disable Time
8
8
6
6
ns
tV
Output Valid
ns
tWPE
tWPD
tEDPD
tRDPD
tXFR
tCOMP
WP Low to Protection Enabled
WP High to Protection Disabled
CS High to Deep Power-down Mode
CS High to Standby Mode
Page to Buffer Transfer Time
Page to Buffer Compare Time
1
1
µs
1
1
µs
3
3
µs
35
200
200
35
200
200
µs
µs
µs
Page Erase and Programming Time
(512/528 bytes)
tEP
17
40
17
40
ms
tP
Page Programming Time (512/528 bytes)
Page Erase Time (512/528 bytes)
Block Erase Time (4096/4224 bytes)
Sector Erase Time (131,072/135,168 bytes)
Chip Erase Time
3
15
6
35
3
15
6
35
ms
ms
ms
s
tPE
tBE
tSE
tCE
tRST
tREC
45
100
5
45
100
5
1.6
TBD
1.6
TBD
TBD
TBD
s
RESET Pulse Width
10
10
µs
µs
RESET Recovery Time
1
1
Note:
1. Values are based on device characterization, not 100% tested in production.
34
AT45DB161D
3500J–DFLASH–4/08
ATMEL [ ATMEL ]
