欢迎访问ic37.com |
会员登录 免费注册
发布采购

AT45DB161D-SU-2.5 参数 Datasheet PDF下载

AT45DB161D-SU-2.5图片预览
型号: AT45DB161D-SU-2.5
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位2.5伏或2.7伏的DataFlash [16-megabit 2.5-volt or 2.7-volt DataFlash]
分类和应用:
文件页数/大小: 53 页 / 1656 K
品牌: ATMEL [ ATMEL ]
 浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第18页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第19页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第20页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第21页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第23页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第24页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第25页浏览型号AT45DB161D-SU-2.5的Datasheet PDF文件第26页  
11.2 Main Memory Page to Buffer Compare  
A page of data in main memory can be compared to the data in buffer 1 or buffer 2. To initiate  
the operation for standard DataFlash page size, a 1-byte opcode, 60H for buffer 1 and 61H for  
buffer 2, must be clocked into the device, followed by three address bytes consisting of 2 don’t  
care bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory that is to  
be compared to the buffer, and 10 don’t care bits. To start a main memory page to buffer com-  
pare for a binary page size, the opcode 60H for buffer 1 or 61H for buffer 2, must be clocked into  
the device followed by three address bytes consisting of 3 don’t care bits, 12 page address bits  
(A20 - A9) that specify the page in the main memory that is to be compared to the buffer, and 9  
don’t care bits. The CS pin must be low while toggling the SCK pin to load the opcode and the  
address bytes from the input pin (SI). On the low-to-high transition of the CS pin, the data bytes  
in the selected main memory page will be compared with the data bytes in buffer 1 or buffer 2.  
During this time (tCOMP), the status register and the RDY/BUSY pin will indicate that the part is  
busy. On completion of the compare operation, bit 6 of the status register is updated with the  
result of the compare.  
11.3 Auto Page Rewrite  
This mode is only needed if multiple bytes within a page or multiple pages of data are modified in  
a random fashion within a sector. This mode is a combination of two operations: Main Memory  
Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of  
data is first transferred from the main memory to buffer 1 or buffer 2, and then the same data  
(from buffer 1 or buffer 2) is programmed back into its original page of main memory. To start the  
rewrite operation for standard DataFlash page size (528 bytes), a 1-byte opcode, 58H for buffer  
1 or 59H for buffer 2, must be clocked into the device, followed by three address bytes com-  
prised of 2 don’t care bits, 12 page address bits (PA11-PA0) that specify the page in main  
memory to be rewritten and 10 don’t care bits. To initiate an auto page rewrite for a binary page  
size (512 bytes), the opcode 58H for buffer 1 or 59H for buffer 2, must be clocked into the device  
followed by three address bytes consisting of 3 don’t care bits, 12 page address bits (A20 - A9)  
that specify the page in the main memory that is to be written and 9 don’t care bits. When a low-  
to-high transition occurs on the CS pin, the part will first transfer data from the page in main  
memory to a buffer and then program the data from the buffer back into same page of main  
memory. The operation is internally self-timed and should take place in a maximum time of tEP.  
During this time, the status register and the RDY/BUSY pin will indicate that the part is busy.  
If a sector is programmed or reprogrammed sequentially page by page, then the programming  
algorithm shown in Figure 25-1 (page 45) is recommended. Otherwise, if multiple bytes in a  
page or several pages are programmed randomly in a sector, then the programming algorithm  
shown in Figure 25-2 (page 46) is recommended. Each page within a sector must be  
updated/rewritten at least once within every 10,000 cumulative page erase/program operations  
in that sector.  
22  
AT45DB161D  
3500J–DFLASH–4/08  
 复制成功!