the DataFlash uses a RapidS serial interface to sequentially access its data. The simple sequen-
tial access dramatically reduces active pin count, facilitates hardware layout, increases system
reliability, minimizes switching noise, and reduces package size. The device is optimized for use
in many commercial and industrial applications where high-density, low-pin count, low-voltage
and low-power are essential.
To allow for simple in-system reprogrammability, the AT45DB081D does not require high input
voltages for programming. The device operates from a single power supply, 2.5V to 3.6V or 2.7V
to 3.6V, for both the program and read operations. The AT45DB081D is enabled through the
chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI),
Serial Output (SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.
2. Pin Configurations and Pinouts
Figure 2-1. MLF (VDFN) Top View
SI
SCK
1
2
3
4
8
7
6
5
SO
GND
VCC
WP
RESET
CS
Figure 2-2. SOIC Top View
SI
SCK
1
2
3
4
8
SO
7
6
5
GND
RESET
CS
VCC
WP
Note:
1. The metal pad on the bottom of the MLF package is floating. This pad can be a “No Connect”
or connected to GND.
2
AT45DB081D
3596L–DFLASH–04/09
ATMEL [ ATMEL ]
