28. Revision History
Revision Level – Release Date History
A – November 2005
Initial Release
Added 6 x 5 mm MLF (VDFN) package.
Added text, in “Programming the Configuration Register”, to indicate
that power cycling is required to switch to “power of 2” page size
after the opcode enable has been executed.
B – January 2006
Corrected typographical error regarding the opcode for chip erase in
“Program and Erase Commands” table.
Added Preliminary.
C – March 2006
D – April 2006
Changed the sector size from 256K bytes to 64K bytes.
Added the “Legacy Commands” table.
Added 8 x 6 mm MLF (VDFN) package.
Changed the sector size of 0a and 0b to 8 pages and 120 pages
respectively.
Changed the Product Version Code to 00001.
E – July 2006
Corrected typographical errors.
Added errata regarding Chip Erase.
F – August 2006
Added AT45DB321D-SU to ordering information and corresponding
8S2 package.
Removed “not recommended for new designs” note from ordering
information for 8MW package.
G – September 2006
H – February 2007
Added AT45DB321D-CNU to ordering information and
corresponding 8CN3 package.
Removed “not recommended for new designs” comment from 8MW
package drawing.
Added additional text to “power of 2” binary page size option.
Changed tVSCL from 50 µs to 70 µs.
Changed tRDPD from 30 µs to 35 µs.
I – August 2007
J – April 2008
Changed tXFR and tCOMP values from 400 µs to 200 µs.
Removed AT45DB321D-CNU from ordering information and
corresponding 8CN3 package.
Added part number ordering code details for suffixes SL954/955.
Added ordering code details.
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AT45DB321D
3597J–DFLASH–4/08