AT45DB081D
28. Revision History
Revision Level – Release Date History
A – November 2005
B – March 2006
Initial Release
Added Preliminary.
Added text, in “Programming the Configuration Register”, to indicate
that power cycling is required to switch to “power of 2” page size
after the opcode enable has been executed.
Added “Legacy Commands” table.
Corrected PA3 in opcode 50h for addressing sequence with
standard page size. Corrected Chip Erase opcode from 7CH to
C7H. Clarified the commands B and C usage for operation mode.
C – July 2006
Removed Preliminary.
D – November 2006
E – February 2007
Added errata regarding Chip Erase.
Changed various timing parameters under Table 18-4.
Removed RDY/BUSY pin references.
51
3596E–DFLASH–02/07
ATMEL [ ATMEL ]
