Features
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Single 2.7V - 3.6V Supply
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Serial Peripheral Interface (SPI) Compatible
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– Supports SPI Modes 0 and 3
66 MHz Maximum Clock Frequency
Flexible, Uniform Erase Architecture
– 4-Kbyte Blocks
– 32-Kbyte Blocks
– 64-Kbyte Blocks
– Full Chip Erase
Individual Sector Protection with Global Protect/Unprotect Feature
– Sixty-Four 64-Kbyte Physical Sectors
Hardware Controlled Locking of Protected Sectors
Flexible Programming
– Byte/Page Program (1 to 256 Bytes)
Automatic Checking and Reporting of Erase/Program Failures
JEDEC Standard Manufacturer and Device ID Read Methodology
Low Power Dissipation
– 7 mA Active Read Current (Typical)
– 4 µA Deep Power-Down Current (Typical)
Endurance: 100,000 Program/Erase Cycles
Data Retention: 20 Years
Complies with Full Industrial Temperature Range
Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 8-lead SOIC (200-mil wide)
– 16-lead SOIC (300-mil wide)
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32-megabit
2.7-volt Only
Serial Firmware
DataFlash
®
Memory
AT26DF321
For New
Designs Use
AT25DF321
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1. Description
The AT26DF321 is a serial interface Flash memory device designed for use in a wide
variety of high-volume consumer based applications in which program code is shad-
owed from Flash memory into embedded or external RAM for execution. The flexible
erase architecture of the AT26DF321, with its erase granularity as small as 4-Kbytes,
makes it ideal for data storage as well, eliminating the need for additional data storage
EEPROM devices.
The physical sectoring and the erase block sizes of the AT26DF321 have been opti-
mized to meet the needs of today's code and data storage applications. By optimizing
the size of the physical sectors and erase blocks, the memory space can be used
much more efficiently. Because certain code modules and data storage segments
must reside by themselves in their own protected sectors, the wasted and unused
memory space that occurs with large sectored and large block erase Flash memory
devices can be greatly reduced. This increased memory space efficiency allows addi-
tional code routines and data storage segments to be added while still maintaining the
same overall device density.
See applicable errata in
3633E–DFLASH–10/07
ATMEL [ ATMEL CORPORATION ]
