AT24C32AN-10SU-2.7 参数 Datasheet PDF下载

AT24C32A/64A

Bus Timing

SCL: Serial Clock, SDA: Serial Data I/O

Write Cycle Timing

SCL: Serial Clock, SDA: Serial Data I/O

SCL

SDA

8th BIT

WORDn

ACK

twr

STOP

CONDITION

Note:

(1)

START

CONDITION

1. The write cycle time t

WR

is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.

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3054N–SEEPR–2/04