AVR32768
9.4 Host mode, powered from bus connection
Figure 9-3. USB host-powering connection example schematic.
USB_VBOF
VBUS
DM
5.0 volt
regulator
VBUS
D-
39 ꢀ
39 ꢀ
DP
D+
USB_ID
ID
GND
Table 9-3. USB host-powering connection checklist.
Signal name Recommended pin connection
Description
GPIO connected to VBUS 5.0V
USB_VBOF
USB power control pin
USB power pin
regulator enable signal
VBUS
DM
Directly to connector
39ꢀ series resistor
Negative differential data line
Positive differential data line
Placed as close as possible to DM
pin
39ꢀ series resistor
DP
Placed as close as possible to DP
pin
GPIO directly connected to
connector
USB_ID
USB identification pin. Pull-up on GPIO pin must be enabled
9.5 USB DFU ISP entry point
The ISP is activated according to the boot process conditions described in the boot
loader document (see section 3.4). By default, the hardware condition is to maintain
pin PA14 of UC3 C at logical 0 while releasing the reset. Once the ISP is activated, it
establishes a USB connection with the connected PC. This I/O should not be used by
the application if the USB DFU boot loader is required to program the application.
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