If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test conditions.
6. Operating ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V,
VIH = VCC - 0.5V; XTAL2 N.C.; EA = Port 0 = VCC; RST = VSS. The internal ROM runs the code 80 FE (label: SJMP label). ICC
would be slightly higher if a crystal oscillator is used. Measurements are made with OTP products when possible, which is
the worst case.
Figure 2. ICC Test Condition, Under Reset
VCC
ICC
VCC
VCC
P0
VCC
RST
EA
XTAL2
XTAL1
(NC)
CLOCK
SIGNAL
VSS
All other pins are disconnected.
Figure 3. Operating ICC Test Condition
VCC
ICC
VCC
P0
VCC
Reset = Vss after a high pulse
during at least 24 clock cycles
RST
EA
(NC)
CLOCK
XTAL2
XTAL1
SIGNAL
All other pins are disconnected.
VSS
Figure 4. ICC Test Condition, Idle Mode
VCC
ICC
VCC
Reset = Vss after a high pulse
during at least 24 clock cycles
VCC
P0
EA
RST
(NC)
CLOCK
SIGNAL
XTAL2
XTAL1
VSS
All other pins are disconnected.
10
80C32E
4149N–AERO–04/07
ATMEL [ ATMEL ]
