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90USB82-16MU 参数 Datasheet PDF下载

90USB82-16MU图片预览
型号: 90USB82-16MU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8 / 16K字节 [8-bit Microcontroller with 8/16K Bytes of ISP Flash]
分类和应用: 微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 306 页 / 2299 K
品牌: ATMEL [ ATMEL ]
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2.2.4  
Port C (PC7..PC0)  
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The  
Port C output buffers have symmetrical drive characteristics with both high sink and source  
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up  
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,  
even if the clock is not running.  
Port C also serves the functions of various special features of the AT90USB82/162 as listed on  
page 76.  
2.2.5  
Port D (PD7..PD0)  
Port D serves as analog inputs to the analog comparator.  
Port D also serves as an 8-bit bi-directional I/O port, if the analog comparator is not used (con-  
cerns PD2/PD1 pins). Port pins can provide internal pull-up resistors (selected for each bit). The  
Port D output buffers have symmetrical drive characteristics with both high sink and source  
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up  
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,  
even if the clock is not running.  
2.2.6  
2.2.7  
2.2.8  
2.2.9  
2.2.10  
D-/SDATA  
D+/SCK  
UGND  
USB Full Speed Negative Data Upstream Port / Data port for PS/2  
USB Full Speed Positive Data Upstream Port / Clock port for PS/2  
USB Ground.  
UVCC  
USB Pads Internal Regulator Input supply voltage.  
UCAP  
USB Pads Internal Regulator Output supply voltage. Should be connected to an external capac-  
itor (1µF).  
2.2.11  
RESET/PC1/dW  
Reset input. A low level on this pin for longer than the minimum pulse length will generate a  
reset, even if the clock is not running. The minimum pulse length is given in Section 9.. Shorter  
pulses are not guaranteed to generate a reset. This pin alternatively serves as debugWire chan-  
nel or as generic I/O. The configuration depends on the fuses RSTDISBL and DWEN.  
2.2.12  
2.2.13  
XTAL1  
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.  
Output from the inverting Oscillator amplifier if enabled by Fuse. Also serves as a generic I/O.  
XTAL2/PC0  
6
AT90USB82/162  
7707D–AVR–07/08  
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