欢迎访问ic37.com |
会员登录 免费注册
发布采购

90USB82-16MU 参数 Datasheet PDF下载

90USB82-16MU图片预览
型号: 90USB82-16MU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8 / 16K字节 [8-bit Microcontroller with 8/16K Bytes of ISP Flash]
分类和应用: 微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 306 页 / 2299 K
品牌: ATMEL [ ATMEL ]
 浏览型号90USB82-16MU的Datasheet PDF文件第154页浏览型号90USB82-16MU的Datasheet PDF文件第155页浏览型号90USB82-16MU的Datasheet PDF文件第156页浏览型号90USB82-16MU的Datasheet PDF文件第157页浏览型号90USB82-16MU的Datasheet PDF文件第159页浏览型号90USB82-16MU的Datasheet PDF文件第160页浏览型号90USB82-16MU的Datasheet PDF文件第161页浏览型号90USB82-16MU的Datasheet PDF文件第162页  
17.6.3  
Receive Compete Flag and Interrupt  
The USART Receiver has one flag that indicates the Receiver state.  
The Receive Complete (RXCn) Flag indicates if there are unread data present in the receive  
buffer. This flag is one when unread data exist in the receive buffer, and zero when the receive  
buffer is empty (i.e., does not contain any unread data). If the Receiver is disabled (RXENn = 0),  
the receive buffer will be flushed and consequently the RXCn bit will become zero.  
When the Receive Complete Interrupt Enable (RXCIEn) in UCSRnB is set, the USART Receive  
Complete interrupt will be executed as long as the RXCn Flag is set (provided that global inter-  
rupts are enabled). When interrupt-driven data reception is used, the receive complete routine  
must read the received data from UDRn in order to clear the RXCn Flag, otherwise a new inter-  
rupt will occur once the interrupt routine terminates.  
17.6.4  
Receiver Error Flags  
The USART Receiver has three Error Flags: Frame Error (FEn), Data OverRun (DORn) and  
Parity Error (UPEn). All can be accessed by reading UCSRnA. Common for the Error Flags is  
that they are located in the receive buffer together with the frame for which they indicate the  
error status. Due to the buffering of the Error Flags, the UCSRnA must be read before the  
receive buffer (UDRn), since reading the UDRn I/O location changes the buffer read location.  
Another equality for the Error Flags is that they can not be altered by software doing a write to  
the flag location. However, all flags must be set to zero when the UCSRnA is written for upward  
compatibility of future USART implementations. None of the Error Flags can generate interrupts.  
The Frame Error (FEn) Flag indicates the state of the first stop bit of the next readable frame  
stored in the receive buffer. The FEn Flag is zero when the stop bit was correctly read (as one),  
and the FEn Flag will be one when the stop bit was incorrect (zero). This flag can be used for  
detecting out-of-sync conditions, detecting break conditions and protocol handling. The FEn  
Flag is not affected by the setting of the USBSn bit in UCSRnC since the Receiver ignores all,  
except for the first, stop bits. For compatibility with future devices, always set this bit to zero  
when writing to UCSRnA.  
The Data OverRun (DORn) Flag indicates data loss due to a receiver buffer full condition. A  
Data OverRun occurs when the receive buffer is full (two characters), it is a new character wait-  
ing in the Receive Shift Register, and a new start bit is detected. If the DORn Flag is set there  
was one or more serial frame lost between the frame last read from UDRn, and the next frame  
read from UDRn. For compatibility with future devices, always write this bit to zero when writing  
to UCSRnA. The DORn Flag is cleared when the frame received was successfully moved from  
the Shift Register to the receive buffer.  
The Parity Error (UPEn) Flag indicates that the next frame in the receive buffer had a Parity  
Error when received. If Parity Check is not enabled the UPEn bit will always be read zero. For  
compatibility with future devices, always set this bit to zero when writing to UCSRnA. For more  
details see “Parity Bit Calculation” on page 151 and “Parity Checker” on page 158.  
17.6.5  
Parity Checker  
The Parity Checker is active when the high USART Parity mode (UPMn1) bit is set. Type of Par-  
ity Check to be performed (odd or even) is selected by the UPMn0 bit. When enabled, the Parity  
Checker calculates the parity of the data bits in incoming frames and compares the result with  
the parity bit from the serial frame. The result of the check is stored in the receive buffer together  
with the received data and stop bits. The Parity Error (UPEn) Flag can then be read by software  
to check if the frame had a Parity Error.  
158  
AT90USB82/162  
7707D–AVR–07/08  
 复制成功!