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90USB82-16MU 参数 Datasheet PDF下载

90USB82-16MU图片预览
型号: 90USB82-16MU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8 / 16K字节 [8-bit Microcontroller with 8/16K Bytes of ISP Flash]
分类和应用: 微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 306 页 / 2299 K
品牌: ATMEL [ ATMEL ]
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AT90USB82/162  
Note:  
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-  
pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on  
page 98 for more details.  
• Bits 3, 2 – Res: Reserved Bits  
These bits are reserved bits in the AT90USB82/162 and will always read as zero.  
• Bits 1:0 – WGM01:0: Waveform Generation Mode  
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting  
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-  
form generation to be used, see Table 14-8. Modes of operation supported by the Timer/Counter  
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of  
Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 95).  
Table 14-8. Waveform Generation Mode Bit Description  
Timer/Counter  
Mode of  
Operation  
Update of  
OCRx at  
TOV Flag  
Mode  
WGM2  
WGM1  
WGM0  
TOP  
Set on(1)(2)  
0
0
0
0
Normal  
0xFF  
Immediate  
TOP  
MAX  
PWM, Phase  
Correct  
1
0
0
1
0xFF  
BOTTOM  
2
3
4
0
0
1
1
1
0
0
1
0
CTC  
OCRA  
0xFF  
Immediate  
MAX  
MAX  
Fast PWM  
Reserved  
TOP  
PWM, Phase  
Correct  
5
1
0
1
OCRA  
TOP  
BOTTOM  
6
7
1
1
1
1
0
1
Reserved  
Fast PWM  
OCRA  
TOP  
TOP  
Notes: 1. MAX  
= 0xFF  
2. BOTTOM = 0x00  
14.8.2  
Timer/Counter Control Register B – TCCR0B  
Bit  
7
6
5
R
0
4
R
0
3
2
1
0
FOC0A  
FOC0B  
WGM02  
R/W  
0
CS02  
R/W  
0
CS01  
R/W  
0
CS00  
R/W  
0
TCCR0B  
Read/Write  
Initial Value  
W
0
W
0
• Bit 7 – FOC0A: Force Output Compare A  
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.  
However, for ensuring compatibility with future devices, this bit must be set to zero when  
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,  
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is  
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a  
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the  
forced compare.  
103  
7707D–AVR–07/08  
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