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90USB1287-16AU 参数 Datasheet PDF下载

90USB1287-16AU图片预览
型号: 90USB1287-16AU
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机具有ISP功能的Flash和USB控制器64 / 128K字节 [Microcontroller with 64/128K Bytes of ISP Flash and USB Controller]
分类和应用: 微控制器
文件页数/大小: 434 页 / 3172 K
品牌: ATMEL [ ATMEL ]
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AT90USB64/128  
Table 9-2.  
Reset and Interrupt Vectors Placement(1)  
BOOTRST  
IVSEL  
Reset Address  
0x0000  
Interrupt Vectors Start Address  
1
1
0
0
0
1
0
1
0x0002  
0x0000  
Boot Reset Address + 0x0002  
0x0002  
Boot Reset Address  
Boot Reset Address  
Boot Reset Address + 0x0002  
Note:  
1. The Boot Reset Address is shown in Table 28-8 on page 366. For the BOOTRST Fuse “1”  
means unprogrammed while “0” means programmed.  
9.1.1  
9.1.2  
Moving Interrupts Between Application and Boot Space  
The General Interrupt Control Register controls the placement of the Interrupt Vector table.  
MCU Control Register – MCUCR  
Bit  
7
6
R
0
5
R
0
4
3
R
0
2
R
0
1
0
JTD  
R/W  
0
PUD  
R/W  
0
IVSEL  
R/W  
0
IVCE  
R/W  
0
MCUCR  
Read/Write  
Initial Value  
• Bit 1 – IVSEL: Interrupt Vector Select  
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash  
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot  
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-  
mined by the BOOTSZ Fuses. Refer to the section “Memory Programming” on page 368 for  
details. To avoid unintentional changes of Interrupt Vector tables, a special write procedure must  
be followed to change the IVSEL bit:  
a. Write the Interrupt Vector Change Enable (IVCE) bit to one.  
b. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.  
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled  
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to  
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status  
Register is unaffected by the automatic disabling.  
Note:  
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is pro-  
grammed, interrupts are disabled while executing from the Application section. If Interrupt Vectors  
are placed in the Application section and Boot Lock bit BLB12 is programed, interrupts are dis-  
abled while executing from the Boot Loader section. Refer to the section “Memory Programming”  
on page 368 for details on Boot Lock bits.  
• Bit 0 – IVCE: Interrupt Vector Change Enable  
71  
7593A–AVR–02/06  
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