AT90USB64/128
Figure 25-1. Analog to Digital Converter Block Schematic
ADC CONVERSION
COMPLETE IRQ
INTERRUPT
FLAGS
ADTS[2:0]
8-BIT DATA BUS
15
0
ADC MULTIPLEXER
SELECT (ADMUX)
ADC CTRL. & STATUS
REGISTER (ADCSRA)
ADC DATA REGISTER
(ADCH/ADCL)
TRIGGER
SELECT
MUX DECODER
PRESCALER
START
CONVERSION LOGIC
AVCC
INTERNAL
SAMPLE & HOLD
COMPARATOR
REFERENCE
AREF
GND
10-BIT DAC
-
+
ADHSM
BANDGAP
REFERENCE
ADC7
SINGLE ENDED / DIFFERENTIAL SELECTION
ADC6
POS.
INPUT
ADC MULTIPLEXER
OUTPUT
ADC5
MUX
ADC4
DIFFERENTIAL
AMPLIFIER
ADC3
+
ADC2
-
ADC1
ADC0
NEG.
INPUT
MUX
25.2 Operation
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
317
7593A–AVR–02/06