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90USB1287-16AU 参数 Datasheet PDF下载

90USB1287-16AU图片预览
型号: 90USB1287-16AU
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机具有ISP功能的Flash和USB控制器64 / 128K字节 [Microcontroller with 64/128K Bytes of ISP Flash and USB Controller]
分类和应用: 微控制器
文件页数/大小: 434 页 / 3172 K
品牌: ATMEL [ ATMEL ]
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AT90USB64/128  
Figure 4-3. The X-, Y-, and Z-registers  
15  
XH  
XL  
0
0
X-register  
7
0
0
7
R27 (0x1B)  
R26 (0x1A)  
15  
YH  
YL  
ZL  
0
0
Y-register  
Z-register  
7
7
R29 (0x1D)  
R28 (0x1C)  
15  
ZH  
0
0
7
7
0
R31 (0x1F)  
R30 (0x1E)  
In the different addressing modes these address registers have functions as fixed displacement,  
automatic increment, and automatic decrement (see the instruction set reference for details).  
4.6  
Stack Pointer  
The Stack is mainly used for storing temporary data, for storing local variables and for storing  
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points  
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-  
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack  
Pointer.  
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt  
Stacks are located. This Stack space in the data SRAM must be defined by the program before  
any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to  
point above 0x0100. The initial value of the stack pointer is the last address of the internal  
SRAM. The Stack Pointer is decremented by one when data is pushed onto the Stack with the  
PUSH instruction, and it is decremented by three when the return address is pushed onto the  
Stack with subroutine call or interrupt. The Stack Pointer is incremented by one when data is  
popped from the Stack with the POP instruction, and it is incremented by three when data is  
popped from the Stack with return from subroutine RET or return from interrupt RETI.  
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of  
bits actually used is implementation dependent. Note that the data space in some implementa-  
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register  
will not be present.  
Bit  
15  
14  
13  
12  
11  
10  
9
8
SP15  
SP7  
7
SP14  
SP6  
6
SP13  
SP5  
5
SP12  
SP4  
4
SP11  
SP3  
3
SP10  
SP2  
2
SP9  
SP1  
1
SP8  
SP0  
0
SPH  
SPL  
Read/Write  
Initial Value  
R/W  
R/W  
0
R/W  
R/W  
0
R/W  
R/W  
1
R/W  
R/W  
0
R/W  
R/W  
0
R/W  
R/W  
0
R/W  
R/W  
0
R/W  
R/W  
0
1
1
1
1
1
1
1
1
13  
7593A–AVR–02/06