AT90S1200 Register Summary
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
$3F
$3E
$3D
$3C
$3B
$3A
$39
$38
$37
$36
$35
$34
$33
$32
$31
$30
$2F
$2E
$2D
$2C
$2B
$2A
$29
$28
$27
$26
$25
$24
$23
$22
$21
$20
$1F
$1E
$1D
$1C
$1B
$1A
$19
$18
$17
$16
$15
$14
$13
$12
$11
$10
$0F
...
SREG
Reserved
Reserved
Reserved
GIMSK
I
T
H
S
V
N
Z
C
page 11
-
INT0
-
-
-
-
-
-
page 15
Reserved
TIMSK
-
-
-
-
-
-
-
-
-
-
-
-
TOIE0
TOV0
-
-
page 16
page 16
TIFR
Reserved
Reserved
MCUCR
Reserved
TCCR0
-
-
-
-
SE
-
SM
-
-
-
-
ISC01
CS01
ISC00
CS00
page 18
CS02
page 21
page 22
TCNT0
Timer/Counter0 (8 Bits)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
WDTCR
Reserved
Reserved
EEAR
-
-
-
-
-
-
WDE
WDP2
WDP1
EEWE
WDP0
EERE
page 23
-
-
EEPROM Address Register
EEPROM Data Register
page 25
page 25
page 25
EEDR
EECR
-
-
-
Reserved
Reserved
Reserved
PORTB
PORTB7
DDB7
PORTB6
DDB6
PORTB5
DDB5
PORTB4
DDB4
PORTB3
DDB3
PORTB2
DDB2
PORTB1
DDB1
PORTB0
DDB0
page 29
page 29
page 29
DDRB
PINB
PINB7
PINB6
PINB5
PINB4
PINB3
PINB2
PINB1
PINB0
Reserved
Reserved
Reserved
PORTD
-
-
-
PORTD6
DDD6
PORTD5
DDD5
PORTD4
DDD4
PORTD3
DDD3
PORTD2
DDD2
PORTD1
DDD1
PORTD0
DDD0
page 34
page 34
page 34
DDRD
PIND
PIND6
PIND5
PIND4
PIND3
PIND2
PIND1
PIND0
Reserved
Reserved
Reserved
ACSR
$09
$08
…
ACD
-
ACO
ACI
ACIE
-
ACIS1
ACIS0
page 27
Reserved
Reserved
$00
Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written.
2. Some of the status flags are cleared by writing a logical “1” to them. Note that the CBI and SBI instructions will operate on all
bits in the I/O register, writing a “1” back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work
with registers $00 to $1F only.
62
AT90S1200
0838H–AVR–03/02
ATMEL [ ATMEL ]
