Power-off Flag
The Power-off flag allows the user to distinguish between a “cold start” reset and a
“warm start” reset.
A cold start reset is the one induced by VCC switch-on. A warm start reset occurs while
V
CC is still applied to the device and could be generated by an exit from Power-down.
The Power-off flag (POF) is located in PCON register (Table 63). POF is set by hard-
ware when VCC rises from 0 to its nominal voltage. The POF can be set or cleared by
software allowing the user to determine the type of reset.
Table 63. PCON Register
PCON - Power Control Register (87h)
7
6
5
-
4
3
2
1
0
SMOD1
SMOD0
POF
GF1
GF0
PD
IDL
Bit
Bit
Number
Mnemonic Description
Serial port Mode Bit 1
Set to select double baud rate in mode 1, 2 or 3.
7
6
5
SMOD1
Serial port Mode Bit 0
SMOD0 Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
Reserved
-
The value read from this bit is indeterminate. Do not set this bit.
Power-off Flag
Cleared to recognize next reset type.
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by
software.
4
POF
General-purpose Flag
3
2
1
0
GF1
GF0
PD
Cleared by user for general-purpose usage.
Set by user for general-purpose usage.
General-purpose Flag
Cleared by user for general-purpose usage.
Set by user for general-purpose usage.
Power-down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle Mode Bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
IDL
Reset Value = 00X1 0000b
Not bit addressable
84
AT89C51RB2/RC2
4180E–8051–10/06
ATMEL [ ATMEL ]
