AT89C51RB2/RC2
Table 2. C51 Core SFRs
Mnemonic
ACC
B
Add Name
7
6
5
4
3
2
1
0
E0h Accumulator
F0h B Register
PSW
SP
D0h Program Status Word
81h Stack Pointer
CY
AC
F0
RS1
RS0
OV
F1
P
DPL
82h Data Pointer Low Byte
83h Data Pointer High Byte
DPH
Table 3. System Management SFRs
Mnemonic
Add Name
7
6
5
-
4
3
2
1
0
PCON
87h Power Control
SMOD1
SMOD0
POF
GF1
XRS1
GF3
GF0
XRS0
0
PD
EXTRAM
-
IDL
AO
AUXR
8Eh Auxiliary Register 0
A2h Auxiliary Register 1
97h Clock Reload Register
8Fh Clock Control Register 0
AFh Clock Control Register 1
DPU
-
M0
XRS2
AUXR1
-
-
ENBOOT
CKRL5
PCAX2
-
-
CKRL4
SIX2
-
DPS
CKRL0
X2
CKRL
CKRL7
CKRL6
WDTX2
-
CKRL3
T2X2
-
CKRL2
T1X2
-
CKRL1
T0X2
-
CKCKON0
CKCKON1
-
-
SPIX2
Table 4. Interrupt SFRs
Mnemonic
Add Name
7
6
EC
-
5
4
3
2
1
0
IEN0
A8h Interrupt Enable Control 0
B1h Interrupt Enable Control 1
EA
ET2
ES
ET1
EX1
ET0
EX0
IEN1
-
-
-
-
-
-
-
PHS
PLS
-
-
ESPI
PX1H
PX1L
SPIH
SPIL
EI2C
PT0H
PT0L
IE2CH
IE2CL
KBD
PX0H
PX0L
KBDH
KBDL
IPH0
B7h Interrupt Priority Control High 0
B8h Interrupt Priority Control Low 0
B3h Interrupt Priority Control High 1
B2h Interrupt Priority Control Low 1
PPCH
PT2H
PT1H
IPL0
PPCL
PT2L
PT1L
IPH1
-
-
-
-
-
-
IPL1
-
Table 5. Port SFRs
Mnemonic
Add Name
7
6
5
4
3
2
1
0
P0
P1
P2
P3
80h 8-bit Port 0
90h 8-bit Port 1
A0h 8-bit Port 2
B0h 8-bit Port 3
5
4180E–8051–10/06
ATMEL [ ATMEL ]
