AT89C51RB2/RC2
Figure 9. Auto-Reload Mode Up/Down Counter (DCEN = 1)
FCLK PERIPH
:6
1
T2
TR2
C/T2
T2CON
T2CON
T2EX:
(DOWN COUNTING RELOAD VALUE)
if DCEN = 1, 1 = UP
FFh
(8-bit)
FFh
(8-bit)
if DCEN = 1, 0 = DOWN
if DCEN = 0, up counting
T2CON
EXF2
TOGGLE
TL2
(8-bit)
TH2
(8-bit)
TIMER 2
INTERRUPT
TF2
T2CON
RCAP2L RCAP2H
(8-bit)
8-bit)
(UP COUNTING RELOAD VALUE)
Programmable Clock-out In the clock-out mode, Timer 2 operates as a 50% duty-cycle, programmable clock gen-
erator (see Figure 10). The input clock increments TL2 at frequency FCLK PERIPH/2. The
Mode
timer repeatedly counts to overflow from a loaded value. At overflow, the contents of
RCAP2H and RCAP2L registers are loaded into TH2 and TL2. In this mode, Timer 2
overflows do not generate interrupts. The formula gives the clock-out frequency as a
function of the system oscillator frequency and the value in the RCAP2H and RCAP2L
registers:
F
CLKPERIPH
Clock OutFrequency
4 × (65536 RCAP2H ⁄ RCAP2L)
For a 16 MHz system clock, Timer 2 has a programmable frequency range of 61 Hz
(FCLK PERIPH/216) to 4 MHz (FCLK PERIPH/4). The generated clock signal is brought out to
T2 pin (P1.0).
Timer 2 is programmed for the clock-out mode as follows:
•
•
•
Set T2OE bit in T2MOD register.
Clear C/T2 bit in T2CON register.
Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L
registers.
•
Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the
reload value or a different one depending on the application.
•
To start the timer, set TR2 run control bit in T2CON register.
It is possible to use Timer 2 as a baud rate generator and a clock generator simulta-
neously. For this configuration, the baud rates and clock frequencies are not
independent since both functions use the values in the RCAP2H and RCAP2L registers.
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4180E–8051–10/06