AT89C51RB2/RC2
DC Parameters for Low
Voltage
TA = 0°C to +70°C; VSS = 0V; VCC = 2.7V to 3.6V; F = 0to 40 MHz
TA = -40°C to +85°C; VSS = 0V; VCC = 2.7V to 3.6V; F = 0 to 40 MHz
Symbol Parameter
Min
-0.5
Typ
Max
Unit Test Conditions
VIL
VIH
Input Low Voltage
0.2 VCC - 0.1
VCC + 0.5
VCC + 0.5
0.45
V
V
V
V
V
V
V
Input High Voltage except RST, XTAL1
Input High Voltage, RST, XTAL1
0.2 VCC + 0.9
0.7 VCC
VIH1
VOL
VOL1
VOH
VOH1
IIL
Output Low Voltage, ports 1, 2, 3, 4(6)
Output Low Voltage, port 0, ALE, PSEN (6)
Output High Voltage, ports 1, 2, 3, 4
Output High Voltage, port 0, ALE, PSEN
Logical 0 Input Current ports 1, 2, 3, 4
Input Leakage Current for P0 only
Logical 1 to 0 Transition Current, ports 1, 2, 3,
RST Pulldown Resistor
IOL = 0.8 mA(4)
IOL = 1.6 mA(4)
IOH = -10 μA
IOH = -40 μA
0.45
0.9 VCC
0.9 VCC
-50
10
μA VIN = 0.45 V
μA 0.45V < VIN < VCC
μA VIN = 2.0V
kΩ
ILI
ITL
-650
250
RRST
50
200 (5)
Fc = 3 MHz
pF
CIO
Capacitance of I/O Buffer
10
50
TA = 25°C
VCC = 2.7V to
IPD
Power Down Current
10 (5)
μA
3.6V(3)
ICCOP
Power Supply Current on normal mode
0.4 x Frequency (MHz) + 5
0.3 x Frequency (MHz) + 5
mA VCC = 3.6 V(1)
mA VCC = 3.6 V(2)
ICCIDLE Power Supply Current on idle mode
0.4 x
Frequency
(MHz) +
20
ICCProg Power Supply Current during flash Write / Erase
mA
V
CC = 5.5V(8)
Notes: 1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 49.), VIL
=
V
V
SS + 0.5V,
IH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see Figure
46).
2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC
0.5V; XTAL2 N.C; Port 0 = VCC; EA = RST = VSS (see Figure 47).
-
3. Power Down ICC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see Fig-
ure 48).
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1
and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed
0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.
5. Typical are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and
5V.
6. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin: 10 mA
Maximum IOL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total IOL for all output pins: 71 mA
109
4180E–8051–10/06