AT89C51RB2/RC2
Table 2.
C51 Core SFRs
Mnemonic
ACC
B
PSW
SP
DPL
DPH
Add
E0h
F0h
D0h
81h
82h
83h
Name
Accumulator
B Register
Program Status Word
Stack Pointer
Data Pointer Low Byte
Data Pointer High Byte
CY
AC
F0
RS1
RS0
OV
F1
P
7
6
5
4
3
2
1
0
Table 3.
System Management SFRs
Mnemonic
PCON
AUXR
AUXR1
CKRL
CKCKON0
CKCKON1
Add
87h
8Eh
A2h
97h
8Fh
AFh
Name
Power Control
Auxiliary Register 0
Auxiliary Register 1
Clock Reload Register
Clock Control Register 0
Clock Control Register 1
7
SMOD1
DPU
-
CKRL7
-
-
6
SMOD0
-
-
CKRL6
WDTX2
-
5
-
M0
ENBOOT
CKRL5
PCAX2
-
4
POF
XRS2
-
CKRL4
SIX2
-
3
GF1
XRS1
GF3
CKRL3
T2X2
-
2
GF0
XRS0
0
CKRL2
T1X2
-
1
PD
EXTRAM
-
CKRL1
T0X2
-
0
IDL
AO
DPS
CKRL0
X2
SPIX2
Table 4.
Interrupt SFRs
Mnemonic
IEN0
IEN1
IPH0
IPL0
IPH1
IPL1
Add
A8h
B1h
B7h
B8h
B3h
B2h
Name
Interrupt Enable Control 0
Interrupt Enable Control 1
Interrupt Priority Control High 0
Interrupt Priority Control Low 0
Interrupt Priority Control High 1
Interrupt Priority Control Low 1
7
EA
-
-
-
-
-
6
EC
-
PPCH
PPCL
-
-
5
ET2
-
PT2H
PT2L
-
-
4
ES
-
PHS
PLS
-
-
3
ET1
-
PT1H
PT1L
-
-
2
EX1
ESPI
PX1H
PX1L
SPIH
SPIL
1
ET0
EI2C
PT0H
PT0L
IE2CH
IE2CL
0
EX0
KBD
PX0H
PX0L
KBDH
KBDL
Table 5.
Port SFRs
Mnemonic
P0
P1
P2
P3
Add
80h
90h
A0h
B0h
Name
8-bit Port 0
8-bit Port 1
8-bit Port 2
8-bit Port 3
7
6
5
4
3
2
1
0
5
4180E–8051–10/06