Table 47. IEN1 Register
IEN1 - Interrupt Enable Register (B1h)
7
6
5
4
3
2
1
0
-
-
-
-
-
ESPI
-
KBD
Bit
Bit
Number
Mnemonic Description
7
6
5
4
3
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
SPI Interrupt Enable Bit
Cleared to disable SPI interrupt.
2
1
0
ESPI
-
Set to enable SPI interrupt.
Reserved
Keyboard Interrupt Enable Bit
Cleared to disable keyboard interrupt.
Set to enable keyboard interrupt.
KBD
Reset Value = XXXX X000b
Bit addressable
60
AT89C51RB2/RC2
4180C–8051–12/03