Table 23. CCON Register
CCON – PCA Counter Control Register (D8h)
7
6
5
-
4
3
2
1
0
CF
CR
CCF4
CCF3
CCF2
CCF1
CCF0
Bit
Bit
Number
Mnemonic Description
PCA Counter Overflow Flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in
CMOD is set. CF may be set by either hardware or software but can only be
cleared by software.
7
CF
PCA Counter Run Control Bit
6
5
4
CR
-
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Module 4 Interrupt Flag
CCF4
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 3 Interrupt Flag
3
2
1
0
CCF3
CCF2
CCF1
CCF0
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 2 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 1 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 0 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
Reset Value = 000X 0000b
Not bit addressable
The watchdog timer function is implemented in Module 4 (see Figure 14).
The PCA interrupt system is shown in Figure 12.
34
AT89C51RB2/RC2
4180C–8051–12/03
ATMEL [ ATMEL ]
