Registers
Table 24. FCON Register
FCON Register FCON (S:D1h)
Flash Control Register
7
6
5
4
3
2
1
0
FPL3
FPL2
FPL1
FPL0
FPS
FMOD1
FMOD0
FBUSY
Bit
Bit
Number
Mnemonic Description
Programming Launch Command bits
7 - 4
FPL3:0
Write 5Xh followed by AXh to launch the programming according to FMOD1:0.
(See Table 22.)
Flash Map Program Space
3
FPS
Set to map the column latch space in the data memory space.
Clear to re-map the data memory space.
Flash Mode
See Table 21 or Table 22.
2 - 1
FMOD1:0
Flash Busy
Set by hardware when programming is in progress.
Clear by hardware when programming is done.
Can not be changed by software.
0
FBUSY
Reset Value = 0000 0000b
40
AT89C5115
4128F–8051–05/06