AT89C5115
FM0 Memory Architecture
The Flash memory is made up of 4 blocks (See Figure 13):
1. The memory array (user space) 16K Bytes
2. The Extra Row
3. The Hardware security bits
4. The column latch registers
User Space
This space is composed of a 16K Bytes Flash memory organized in 128 pages of 128
Bytes. It contains the user’s application code.
Extra Row (XRow)
Hardware Security Byte
This row is a part of FM0 and has a size of 128 Bytes. The extra row may contain infor-
mation for boot loader usage.
The Hardware security Byte space is a part of FM0 and has a size of 1 byte.
The 4 MSB can be read/written by software, the 4 LSB can only be read by software and
written by hardware in parallel mode.
Column Latches
The column latches, also part of FM0, have a size of full page (128 Bytes).
The column latches are the entrance buffers of the three previous memory locations
(user array, XROW and Hardware security byte).
Cross Flash Memory Access
Description
The FM0 memory can be programmed as describe on Table 20. Programming FM0
from FM0 is impossible.
The FM1 memory can be program only by parallel programming.
Table 20 show all software Flash access allowed.
Table 20. Cross Flash Memory Access
FM0
(user Flash)
FM1
(boot Flash)
Action
Read
Load column latch
Write
ok
ok
-
-
-
FM0
(user Flash)
-
Read
ok
ok
ok
ok
-
FM1
(boot Flash)
Load column latch
Write
-
33
4128F–8051–05/06
ATMEL [ ATMEL ]
