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89C5115-TISUM 参数 Datasheet PDF下载

89C5115-TISUM图片预览
型号: 89C5115-TISUM
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, 40MHz, CMOS, PDSO28, SOIC-28]
分类和应用: 时钟ATM异步传输模式微控制器光电二极管外围集成电路
文件页数/大小: 113 页 / 730 K
品牌: ATMEL [ ATMEL ]
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Dual Data Pointer  
Description  
The T89C5115 implements a second data pointer for speeding up code execution and  
reducing code size in case of intensive usage of external memory accesses.  
DPTR0 and DPTR1 are Seen by the CPU as DPTR and are accessed using the SFR  
addresses 83h and 84h that are the DPH and DPL addresses. The DPS bit in AUXR1  
register (See Figure 18) is used to select whether DPTR is the data pointer 0 or the data  
pointer 1 (See Figure 11).  
Figure 11. Dual Data Pointer Implementation  
0
1
DPL0  
DPL1  
DPL  
DPTR0  
DPTR1  
AUXR1.0  
DPTR  
DPS  
0
1
DPH0  
DPH1  
DPH  
Application  
Software can take advantage of the additional data pointers to both increase speed and  
reduce code size, for example, block operations (copy, compare…) are well served by  
using one data pointer as a “source” pointer and the other one as a “destination” pointer.  
Hereafter is an example of block move implementation using the two pointers and coded  
in assembler. The latest C compiler takes also advantage of this feature by providing  
enhanced algorithm libraries.  
The INC instruction is a short (2 Bytes) and fast (6 machine cycle) way to manipulate the  
DPS bit in the AUXR1 register. However, note that the INC instruction does not directly  
force the DPS bit to a particular state, but simply toggles it. In simple routines, such as  
the block move example, only the fact that DPS is toggled in the proper sequence mat-  
ters, not its actual value. In other words, the block move routine works the same whether  
DPS is 0 or 1 on entry.  
; ASCII block move using dual data pointers  
; Modifies DPTR0, DPTR1, A and PSW  
; Ends when encountering NULL character  
; Note: DPS exits opposite to the entry state unless an extra INC AUXR1 is  
added  
AUXR1EQU0A2h  
move:movDPTR,#SOURCE ; address of SOURCE  
incAUXR1 ; switch data pointers  
movDPTR,#DEST ; address of DEST  
mv_loop:incAUXR1; switch data pointers  
movxA,@DPTR; get a byte from SOURCE  
incDPTR; increment SOURCE address  
incAUXR1; switch data pointers  
movx@DPTR,A; write the byte to DEST  
incDPTR; increment DEST address  
jnzmv_loop; check for NULL terminator  
end_move:  
26  
AT89C5115  
4128F–8051–05/06  
 
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