Data Memory
The T89C5115 provides data memory access in two different spaces:
The internal space mapped in three separate segments:
•
•
•
The lower 128 Bytes RAM segment.
The upper 128 Bytes RAM segment.
The expanded 256 Bytes RAM segment (XRAM).
A fourth internal segment is available but dedicated to Special Function Registers,
SFRs, (addresses 80h to FFh) accessible by direct addressing mode.
Figure 9 shows the internal data memory spaces organization.
Figure 9. Internal memory - RAM
FFh
FFh
80h
FFh
Upper
128 Bytes
Internal RAM
Indirect Addressing
Special
Function
Registers
Direct Addressing
256 Bytes
Internal XRAM
80h
7Fh
Lower
128 Bytes
Internal RAM
Direct or Indirect
Addressing
00h
00h
Internal Space
Lower 128 Bytes RAM
The lower 128 Bytes of RAM (See Figure 10) are accessible from address 00h to 7Fh
using direct or indirect addressing modes. The lowest 32 Bytes are grouped into 4
banks of 8 registers (R0 to R7). Two bits RS0 and RS1 in PSW register (See Table 17)
select which bank is in use according to Table 16. This allows more efficient use of code
space, since register instructions are shorter than instructions that use direct address-
ing, and can be used for context switching in interrupt service routines.
Table 16. Register Bank Selection
RS1
RS0
Description
0
0
1
1
0
1
0
1
Register bank 0 from 00h to 07h
Register bank 0 from 08h to 0Fh
Register bank 0 from 10h to 17h
Register bank 0 from 18h to 1Fh
The next 16 Bytes above the register banks form a block of bit-addressable memory
space. The C51 instruction set includes a wide selection of singlebit instructions, and
the 128 bits in this area can be directly addressed by these instructions. The bit
addresses in this area are 00h to 7Fh.
24
AT89C5115
4128F–8051–05/06
ATMEL [ ATMEL ]
