AT89C1051U
Flash Programming Modes
Mode
RST/VPP
P3.2/PROG
P3.3
P3.4
P3.5
P3.7
Write Code Data(1)(3)
12V
L
H
H
H
Read Code Data(1)
H
H
L
L
H
H
H
H
Write Lock
Bit - 1
Bit - 2
12V
H
H
12V
12V
H
H
H
L
H
L
L
L
L
L
L
L
L
Chip Erase
(2)
Read Signature Byte
H
Notes: 1. The internal PEROM address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse at
XTAL1 pin.
2. Chip Erase requires a 10-ms PROG pulse.
3. P3.1 is pulled Low during programming to indicate RDY/BSY.
Figure 3. Programming the Flash Memory
Figure 4. Verifying the Flash Memory
AT89C1051U
AT89C1051U
PP
7