AT85C51SND3Bx
•
•
The DPACC bit and the DPADD10:0 field can be set by software. The DPRAM is not
cleared.
The SPDCONF bits can be set by software.
After setting USBE, the USB Controller enters in the Host or in the Device state (accord-
ing to the UID pin level). The selected controller is ‘Idle’.
The USB Controller can at any time be ‘stopped’ by clearing USBE. In fact, clearing
USBE acts as an hardware reset.
Interrupts
As shown in Figure 52, the USB controller implements five main global interrupt
sources: the USB general and OTG interrupts detailed in Figure 53, the USB device and
endpoint interrupts detailed in Section “Interrupts”, page 113, and the USB host and
pipe interrupts detailed in Section “Interrupt”, page 134.
Figure 52. USB Interrupt System
USB General
& OTG Interrupt
USB Device
Interrupt
Endpoint
Interrupt
USB Controller
Interrupt Request
USB Host
Interrupt
EUSB
IEN1.0
Pipe
Interrupt
Figure 53. USB General and OTG Interrupt System
IDTI
USBINT.1
IDTE
USBCON.1
VBUSTI
USBINT.0
VBUSTE
USBCON.0
STOI
OTGINT.5
STOE
OTGIEN.5
HNPERRI
OTGINT.4
USB General
& OTG Interrupt
HNPERRE
OTGIEN.4
ROLEEXI
OTGINT.3
ROLEEXE
OTGIEN.3
BCERRI
OTGINT.2
BCERRE
OTGIEN.2
VBERRI
OTGINT.1
VBERRE
OTGIEN.1
SRPI
OTGINT.0
SRPE
OTGIEN.0
87
7632A–MP3–03/06
ATMEL [ ATMEL ]
