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85C51SND3BX01 参数 Datasheet PDF下载

85C51SND3BX01图片预览
型号: 85C51SND3BX01
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片数字音频解码器 - 编码器与USB 2.0接口 [Single-Chip Digital Audio Decoder - Encoder with USB 2.0 Interface]
分类和应用: 解码器编码器
文件页数/大小: 263 页 / 3620 K
品牌: ATMEL [ ATMEL ]
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Receiver Errors  
There are three kinds of errors that can be set during character reception: the framing  
error, the parity error, and the overrun error detailed in the following sections.  
Framing Error  
A framing error occurs when the stop field of a received character is not at high level.  
Framing error is reported in FEI flag in SINT. Framing error condition is acknowledged  
by clearing the FEI flag.  
Parity Error  
A parity error occurs when the parity field of a received character does not matches the  
programmed one in PMOD1:0 bits. Parity error is reported in PEI flag in SINT. Parity  
error condition is acknowledged by clearing the PEI flag.  
Overrun Error  
An overrun error occurs when a character is received while the Rx shift register is full  
(Rx FIFO full). In this case, received character is discarded. Overrun error is reported in  
OEI flag in SINT. Overrun error condition is acknowledged by clearing the OEI flag.  
Note:  
In case of data burst reception, the error flags report an error within the data burst. It is  
obvious to discard the whole data burst and to handle the errors by the protocol (retry…).  
Transmitter  
As shown in Figure 112, the transmitter is based on a character handler taking care of  
character transmission and fed by the transmission shift register filled itself by a 1-byte  
data FIFO managed by the FIFO and flow controller.  
Figure 112. Transmitter Block Diagram  
SBUF Tx  
1-byte FIFO  
FIFO & Flow Controller  
CTS  
TXD  
TI  
SINT.0  
EOTI  
SINT.5  
CTSEN  
SCON.3  
Tx Shift Reg  
Character Handler  
BRG  
CLOCK  
GBIT1:0  
SCON.1:0  
Flow Control  
The transmission flow can be controlled by hardware using the CTS pin controlled by  
the external receiver. The goal of the flow control is to stop transmission when the  
receiver is full of data. CTS usage and so associated flow control is enabled using  
CTSEN bit in SFCON.  
The transmitter stop latency may vary from 0 to a maximum of 1 character, meaning that  
transmission always stops at the end of the character under transmission if any.  
Interrupts  
As shown in Figure 113, the SIO implements five interrupt sources reported in RI, TI,  
FEI, PEI, OEI and EOTI flags in SINT. These flags are detailed in the previous sections.  
These sources are enabled separately using RIE, TIE, FEIE, PEIE, OEIE and EOTIE  
enable bits respectively in SIEN.  
The interrupt request is generated each time an enabled source flag is set, and the glo-  
bal SIO interrupt enable bit is set (ES in IEN0 register).  
218  
AT85C51SND3Bx  
7632A–MP3–03/06  
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