OTG Timers Customizing It is possible to refine some OTG timers thanks to the OTGTCON register (see
Table 108). This register is multiplexed with the OTGCON register. The timers are as
defined in the OTG specification:
•
•
•
•
AWaitVrise time-out. [OTG] chapter 6.6.5.1
VbBusPulsing. [OTG] chapter 5.3.4
PdTmOutCnt. [OTG] chapter 5.3.2
SRPDetTmOut. [OTG] chapter 5.3.3
Table 101. OTG Timer Configuration
PAGE1:0
VALUE2:0
Timing Parameter
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
AWaitVrise time-out = 20 ms.
AWaitVrise time-out = 50 ms.
AWaitVrise time-out = 70 ms.
AWaitVrise time-out = 100 ms.
VbBusPulsing = 15 ms.
VbBusPulsing = 23 ms.
VbBusPulsing = 31 ms.
VbBusPulsing = 40 ms.
PdTmOutCnt = 96 ms.
PdTmOutCnt = 105 ms.
PdTmOutCnt = 118 ms.
PdTmOutCnt = 131 ms.
SRPDetTmOut = 10 µs.
SRPDetTmOut = 100 µs.
SRPDetTmOut = 1 ms.
SRPDetTmOut = 11 ms.
00
01
10
11
Plug-in detection
The USB connection is detected by the VBUS pad, thanks to the following architecture:
Figure 57. Plug-in Detection Input Block Diagram
VDD
VBus_pulsing
Session_valid
UVCC
Logic
VBUS
USBSTA.0
VBUSTI
USBINT.0
Va_Vbus_valid
VBus_discharge
VSS
Pad logic
92
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
