Table 77. IPL1 Register
IPL1 (0.B2h) – Interrupt Priority Low Register 1
7
6
5
4
3
2
1
0
-
-
IPLMMC
IPLNFC
IPLSPI
IPLPSI
IPLKB
IPLUSB
Bit
Bit
Number
Mnemonic Description
Reserved
7-6
5
-
The value read from these bits is always 0. Do not set these bits.
MMC/SD Interrupt Priority Level Lsb
IPLMMC
IPLNFC
IPLSPI
IPLPSI
IPLKB
Refer to Table 70 for priority level description.
NFC Interrupt Priority Level Lsb
4
Refer to Table 70 for priority level description.
SPI Interrupt Priority Level Lsb
3
Refer to Table 70 for priority level description.
PSI Interrupt Priority Level Lsb
2
Refer to Table 70 for priority level description.
KBD Interrupt Priority Level Lsb
1
Refer to Table 70 for priority level description.
USB Interrupt Priority Level Lsb
0
IPLUSB
Refer to Table 70 for priority level description.
Reset Value = 0000 0000b
64
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
