ADWr
ADCs
ADRc
ADRdy
ADTrig
O
O
O
I
I
DAC write strobe
ADC chip select
ADC read/convert
ADC ready
ADC trigger
Memory interface address - These active high outputs carry
the address during accesses on the memory bus. When no
access is performed, the address of the last access is driven
(also internal cycles).
Memory interface data - MemD[31:0] carries the data during
transfers on the memory bus. The processor only drives the
bus during write cycles. During accesses to 8-bit areas, only
MemD[31:24] are used.
Memory interface checkbitsMemCB[6:0] carries the EDAC
checkbits, MemCB[7] takes the value of TB[7] in the error
control register. The processor only drive MemCB[7:0] during
write cycles to areas programmed to be EDAC protected
SRAM chip select - These active low signals provide an
individual output enable for each SRAM bank.
SRAM output enable -These active low outputs provide the
chip-select signals for each SRAM bank.
SRAM byte write strobe - These active low outputs provide
individual write strobes for each byte lane. MemWrN[0]
controls MemD[31:24], MemWrN[1] controls MemD[23:16],
etc.
PROM chip select - These active low outputs provide the chip-
select signal for the PROM area. RomCsN[0] is asserted when
the lower half of the PROM area is accessed (0 -
0x10000000), while RomCsN[1] is asserted for the upper half.
I/O area chip select - This active low output is the chip-select
signal for the memory mapped I/O area.
I/O area output enable - This active low output is asserted
during read cycles on the memory bus.
I/O area read - This active high output is asserted during read
cycles on the memory bus.
I/O area write - This active low output provides a write strobe
during write cycles on the
memory bus.
I/O area ready - This active low input indicates that the access
to a memory mapped I/O area can be terminated on the next
rising clock edge.
MemA[22:0]
O
MemD[31:0]
IO
MemCB[7:0]
IO
MemCsN[3:0]
O
MemOeN[3:0]
O
MemWrN[3:0]
O
RomCsN[1:0]
O
IoCsN
O
IoOeN
O
IoRead
O
IoWrN
O
IoBrdyN
I
6
AT7913E
7833F–AERO–01/10
ATMEL [ ATMEL CORPORATION ]
