TS68EN360
8.5
Upgrading Designs from the TS68302
Since the QUICC is a next-generation TS68302, many designers currently using the TS68302
may wish to use the QUICC in a follow-on design. The following paragraphs briefly discuss this
endeavor in terms of architectural approach, hardware issues, and software issues.
8.5.1
Architectural Approach
The QUICC is the logical extension of the TS86302, but the overall architecture and philosophy
of the TS86302 design remains intact in the QUICC. The QUICC keeps the best features of the
TS86302, while making the changes required to provide for the increased flexibility, integration,
and performance requested by customers. Because the CPM is probably the most difficult mod-
ule to learn, anyone who has used the TS86302 can easily become familiar with the QUICC
since the CPM architectural approach remains intact.
The most significant architectural change made on the QUICC was the translation of the design
into the standard 68300 family IMB architecture, resulting in a faster CPU and different system
integration features.
Although the features of the SIM60 do not exactly correspond to those of the TS86302 SIM, they
are very similar.
Because of the similarity of the QUICC SIM60 and CPU to other members of the 68300 family,
such as the TS68332, previous users of these devices will be comfortable with these same fea-
tures on the QUICC.
8.5.2
Hardware Compatibility Issues
The following list summarizes the hardware differences between the TS86302 and the QUICC:
• Pinout – The pinout is not the same. The QUICC has 240 pins; the TS86302 has 132 pins
• Package – Both devices offer PGA and PQFP packages. However, the QUICC QFP package
has a 20-mil pitch; whereas, the TS86302 QFP package has a 25-mil pitch
• System Bus – The system bus signals now look like those of the TS68020 as opposed to
those of the 68000. It is still possible to interface 68000 peripherals to the QUICC, utilizing the
same techniques used to interface them to a TS68020
• System Bus in Slave Mode – A number of QUICC pins take on new functionality in slave
mode to support an external TS68EC040. On the TS68302, the pin names generally
remained the same in slave mode
• Peripheral Timing – The external timings of the peripherals (SCCs, timers, etc.) are very
similar (if not identical) to corresponding peripherals on the TS68302
• Pin Assignments – The assignment of peripheral functions to I/O pins is different in several
ways. First, the QUICC contains more general-purpose parallel I/O pins than the TS68302.
However, the QUICC offers many more functions than even a 240-pin package would
normally allow, resulting in more multifunctional pins than the TS68302
8.5.3
Software Compatibility Issues
The following list summarizes the major software differences between the TS68302 and the
QUICC:
• Since the CPU32+ is a superset of the 68000 instruction set, all previously written code will
run. However, if such code is accessing the TS68302 peripherals, it will require some
modification
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ATMEL [ ATMEL ]
