Features
•
Industry Standard Architecture
•
•
•
– Low-cost Easy-to-use Software Tools
High-speed, Electrically Erasable Programmable Logic Devices
CMOS and TTL Compatible Inputs and Outputs
– Input and I/O Pull-up Resistors
Advanced Flash Technology
– Reprogrammable
– 100% Tested
High-reliability CMOS Process
– 20 year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200mA Latchup Immunity
Full Military Temperature Ranges
Dual-in-line and Surface Mount Packages in Standard Pinouts
PCI Compliant
•
•
•
•
Figure 0-1.
Logic Diagram
High-performance
Electrically
Erasable
Programmable
Logic Device
Atmel ATF22V10B
Figure 0-2.
Pin Configurations
All Pinouts Top View
Pin Name
CLK
IN
I/O
*
V
CC
Function
Clock
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5V Supply
TSSOP
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
DIP/SOIC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
LCC/PLCC
IN
IN
CLK/IN
*
VCC
I/O
I/O
4
3
2
1
28
27
26
IN
IN
GND
*
IN
I/O
I/O
12
13
14
15
16
17
18
IN
IN
IN
*
IN
IN
IN
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
*
I/O
I/O
I/O
0250M–PLD–7/10