29C516E
3.3. Pin Configuration for multilayer quad Flat–pack (flat or L leaded)
Figure 3.Pin Configuration
index corner
nc
nc
MEM2
Gnd
U2D[15]
U2D[14]
U2D[13]
U2D[12]
Vcc
U2D[11]
U2D[10]
U2D[9]
U2D[8]
Gnd
U2D[7]
U2D[6]
U2D[5]
U2D[4]
Vcc
U2D[3]
U2D[2]
U2D[1]
U2D[0]
Gnd
NCERR
CERR
N22
U1D[15]
nc
nc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
Vcc
RD/WR2
CORRECT
SYNCHK
TRANS
U2/U1
EN2
Gnd
Gnd
MC[7]
MC[6]
MC[5]
MC[4]
Vcc
MC[3]
MC[2]
MC[1]
MC[0]
nc
nc
MQFPF100
or
MQFPL100
(Top view)
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
nc
nc
Gnd
MD[15]
MD[14]
MD[13]
MD[12]
Vcc
MD[11]
MD[10]
MD[9]
MD[8]
Gnd
MD[7]
MD[6]
MD[5]
MD[4]
Vcc
MD[3]
MD[2]
MD[1]
MD[0]
Gnd
MEM1
EN1
RD/WR1
Vcc
U1D[0]
nc
nc
nc
Vcc
U1D[14]
U1D[13]
U1D[12]
Gnd
U1D[11]
U1D[10]
U1D[9]
U1D[8]
Vcc
U1D[7]
U1D[6]
U1D[5]
U1D[4]
Gnd
U1D[3]
U1D[2]
U1D[1]
nc
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Rev.
E
(03
2007)
3
ATMEL [ ATMEL CORPORATION ]
