AT27C4096
Features
•
Fast Read Access Time - 55 ns
•
Low Power CMOS Operation
•
– 100
µA
Maximum Standby
– 40 mA Maximum Active at 5 MHz
JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm x 14 mm)
Direct Upgrade from 512K bit, 1M bit, and 2M bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
5V
±
10% Power Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
™
Programming Algorithm - 50
µs/word
(typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
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•
•
•
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4-Megabit
(256K x 16)
OTP EPROM
AT27C4096
Description
The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time program-
mable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a sin-
gle 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16- and 32-bit microprocessor
systems.
(continued)
Pin Configurations
Pin Name
A0 - A17
O0 - O15
CE
OE
NC
Note:
PDIP Top View
Function
Addresses
Outputs
Chip Enable
Output Enable
No Connect
Both GND pins must be
connected.
PLCC Top View
TSOP Top View
Type 1
0311E-A–06/97
1
ATMEL [ ATMEL CORPORATION ]
