Features
•
Low-voltage and Standard-voltage Operation
– 5.0 (V
CC
= 4.5V to 5.5V)
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 3.6V)
Internally Organized 65,536 x 8
2-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
128-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Typical)
High Reliability
– Endurance: 100,000 Write Cycles
– Data Retention: 40 Years
– ESD Protection: >4000V
Automotive Grade and Extended Temperature Devices Available
8-pin PDIP and 20-pin JEDEC SOIC, 8-pin LAP, and 8-ball dBGA
TM
Packages
•
•
•
•
•
•
•
•
•
2-wire Serial
EEPROM
512K (65,536 x 8)
•
•
AT24C512
Description
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s
cascadable feature allows up to 4 devices to share a common 2-wire bus. The device
is optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The devices are available in space-saving
8-pin PDIP, 20-pin JEDEC SOIC, 8-pin Leadless Array (LAP), and 8-ball dBGA pack-
ages. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to
5.5V) and 1.8V (1.8V to 3.6V) versions.
Pin Configurations
Pin Name
A0 - A1
SDA
SCL
WP
NC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
20-pin SOIC
A0
A1
NC
NC
NC
NC
NC
NC
NC
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
WP
NC
NC
NC
NC
NC
NC
SCL
SDA
A0
A1
NC
GND
8-pin PDIP
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
8-pin Leadless Array
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
A0
A1
NC
GND
Bottom View
8-ball dBGA
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
A0
A1
NC
GND
Rev. 1116D–07/00
Bottom View
1
ATMEL [ ATMEL CORPORATION ]
