24C128 参数 Datasheet PDF下载

AT24C128/256

Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)

Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)

SCL

SDA

8th BIT

WORD n

ACK

t

WR

STOP

CONDITION

(1)

START

CONDITION

Note:

1.

The write cycle time t

WR

is the time from a valid stop condition of a write sequence to the end of the internal clear/write

cycle.

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