Technical Reference Note (APC08)
Typical Application Circuit (Standard Pinout)
Recommended C1 is a low ESR (<100 mohms) 100 µF tantalum and C2 is a 1 µF ceramic or equivalent. Recommended
output decoupling capacitor C3 for –W models is 22 µF low ESR ceramic capacitor (at a min). For all other models, C3 can go
as low as 1 µF ceramic capacitor.
Figure 2. Typical Application Circuit.
Enable Pin (Standard configuration)
Pin P5 is functioned to enable the output voltage of a
module. If this pin is left open or connected to > 4.1Vdc
up to 14Vdc, the module is turned on. On the other hand,
if this pin is connected to ground or to a voltage potential
from 0 to 0.8Vdc, the module is turned off. The enable pin
can source current up to 60mA max - suited for typical
open-collector transistors readily available in the market.
For TTL compatibility, Figure 3 shows a 7405 open
collector inverter IC utilized to function the Enable
feature. Other common chips that can do the function are
74S05; 74HCT05; non-inverting - 7407; 74S07; 74HC07.
If SMT packaging is preferred, Fairchild's Tiny Logic
NC7SZ05 or TI's Little Logic SN7SLVC1G06 comes in SOT23
or SC70 packages.
Figure 3. Output Voltage Enable function diagram.
Special Feature Pins (Options):
Trim Function (-9):
Pin P4 is used for output voltage adjustment. The output voltage can be trimmed through an external resistor or through an
external DC supply as described in the succeeding sections.
Method 1: External Trim Resistor.
By connecting an external resistor across P4 and P3 (Gnd), the voltage appearing on pin P2 (Vo) is adjusted to a higher value.
The output voltage of a module can be adjusted up to a maximum value of 3.3V (nominal) or 83% of the input voltage,
MODEL: APC08 SERIES
SHEET 8 OF 23
OCTOBER 4, 2004 - REVISION 03
ASTEC [ Astec America, Inc ]
